verilog question, break while loop to avoid combinational feedbackduring synthesis

verilog question, break while loop to avoid combinational feedbackduring synthesis

瀏覽:1034
日期:2024-10-05
verilog question, break while loop to avoid combinational feedbackduring synthesis + Reply to Thread Results 1 to 5 of 5 ... 'disable count;' statement does not break the loop (or maybe it's reentered right away?) Does always code_block causes code_block ...看更多